1. Field of the Invention
The invention relates to a semiconductor device, and more particularly, to a bonding pad structure overlapping die region and scribe line region.
2. Description of the Prior Art
Today the functionality and economics of many consumer products are being transformed by “system-on-chip” (SoC) technology. The continuing increase in the transistor densities means that it is now possible to integrate the processor, peripherals and some or all of the system memory on a single chip.
SoC is an idea of integrating all components of a computer or other electronic system into a single integrated circuit chip. It may contain micro processing core, MPEG core, memory, digital/analog circuits, mixed-signal circuits, and often radio-frequency functions—all on one chip. SoC is believed to be more cost effective since it increases the yield of the fabrication and also its packaging is less complicated.
In the design of SoC, the height difference between chip and substrate plays a critical role in the wire bonding process afterwards. Typically, after chip is fabricated a procedure is carried out to extend circuits from the chip to a lower surface of the substrate through re-distribution layer (RDL) for wire bonding process conducted afterwards. This approach not only increases the difficulty of the process but also consumes time and cost significantly. Hence, how to provide a more simplified design of the current architecture has become an important task in this field.